Position title: Power Support
Qualcomm's System Validation and Emulation Team is part of the central SoC digital hardware organization responsible for the overall quality of the SoC silicon. The Validation team works closely with architects, designers, verification engineers, software engineers, and customers.
The team is currently seeking a candidate for the position of SOC Power Validation Engineer. In this role, the candidate will work with a local and global team to understand, implement and verify the power features, power savings, power saving predictions, and performance of implementations of current and next-generation SoCs. Candidate will create and execute test plans in both emulation and Post-Si environments, and work to discover, root-cause and correct failures in hardware and software. Additionally, Candidate will create the software and flows which allow the maximum use of power saving features.
Candidate will also be responsible for post-silicon mixed-signal intellectual property (IP) and SOC lab bring up and characterization. The team is looking for candidates with a passion for lab work and debug mindset, can perform detailed IP analysis.
The candidate will also be responsible for post-silicon content/driver development and automation of design under test along with validation efforts and working closely with design/production/bench IP teams.
Candidate will have a minimum of 3 years of experience working in power estimate tools, emulation, and silicon environments. Candidates are expected to have experience in:
- Emulation environments for hardware and software development and debug
- Familiarity with Power Estimate software such as Ansys, Cadence, and Primetime tools
- Analyzing power estimates, correlation, and power efficiency
- Verilog RTL
- SoC architectures
- Strong C programming skills
- Strong Python/Perl scripting experience, including tool creation and flow automation
- Strong understanding of power and performance features
- Understanding of silicon features such as isolation, clock gating, and power gating methodologies
- Analyzing power data and drawing conclusions compared to pre-silicon
- Basic understanding of debugging
- Strong power background for pre and post-silicon environments
- Implementing bare-metal drivers and test content
- Experience in low-level C drivers, microkernel, RTOS, Linux, etc.
Power, Performance, Validation, mix signal IP, Automation, Verification, RTL, Emulation, PtPx, Joules, PowerArtist, and GLS, logic analyzer, oscilloscope
- Required: Bachelor's, Computer Engineering and/or Electrical Engineering
- Preferred: Master's, Computer Engineering and/or Electrical Engineering
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