Job Overview

The team is currently seeking a candidate for the position of SOC/Emulation Power Engineer.  In this role candidate will work with a local and global team to understand, implement and verify the power / Mix signal IP, and Performance features on next-generation SoCs.  Candidate needs a very good digital and mix signal design knowledge to identify and root cause issues and drive changes to design, Candidate will also be working with SW counterpart to deliver a consolidated driver configuration. Additionally, Candidate will be proactively involved in developing and improvising tuning methodologies and automation for volume analysis.

Minimum Qualifications

Experience with:

• Emulation environments for hardware and software development and debug
• Familiarity with Power Estimate software such as Ansys, Cadence, and Primetime tools
• Analyzing power estimates, correlation, and power efficiency
• Verilog RTL
•  SoC architectures
• Strong C programming skills
• Strong analog/mix signal fundamental clarity 
• Strong Python scripting experience, including tool creation and flow automation
• Understanding of power and performance features
• Understanding of silicon features such as isolation, clock gating, and power gating methodologies
• Design/SW debug mindset 

Preferred Qualifications

• Strong power background for pre and post silicon environments
• Implementing bare-metal drivers and test content
• Experience in low level C drivers, micro kernel, RTOS, Linux, etc.

Keywords

• Power, Performance, mix signal IP, Analog,  Automation, Verification, Validation, RTL, Emulation, PtPx, Cdyn, PowerArtist, GLS, logic analyzer, oscilloscope, Python, Jtag 

Educational Requirements

• Required: Bachelor's, Computer Engineering and/or Electrical Engineering
• Preferred: Master's, Computer Engineering and/or Electrical Engineering

Please contact Pranjal Srivastava pranjals@qti.qualcomm.com